Hardware Verification with SystemVerilog: An Object-Oriented Framework

Description

Hardware Verification with SystemVerilog: An Object-Oriented Framework

By Mike Mintz, Robert Ekendahl,

Publisher: Springer
Number Of Pages: 299
Publication Date: 2007-05-16
Sales Rank: 96016
ISBN / ASIN: 0387717382
EAN: 9780387717388
Binding: Hardcover
Manufacturer: Springer
Studio: Springer
Average Rating: 5

Verification is increasingly complex, and SystemVerilog is one of the languages that the verification community is turning to. However, no language by itself can guarantee success without proper techniques. Object-oriented programming (OOP), with its focus on managing complexity, is ideally suited to this task.

With this handbook¡ªthe first to focus on applying OOP to SystemVerilog¡ªwe¡¯ll show how to manage complexity by using layers of abstraction and base classes. By adapting these techniques, you will write more "reasonable" code, and build efficient and reusable verification components.

Both a learning tool and a reference, this handbook contains hundreds of real-world code snippets and three professional verification-system examples. You can copy and paste from these examples, which are all based on an open-source, vendor-neutral framework (with code freely available at www.trusster.com).

Learn about OOP techniques such as these:

Creating classes¡ªcode interfaces, factory functions, reuse

Connecting classes¡ªpointers, inheritance, channels

Using "correct by construction"¡ªstrong typing, base classes

Packaging it up¡ªsingletons, static methods, packages

This handbook guides the user in applying OOP techniques for verification. Mike and Robert have captured their years of experience in a clear and easy-to-read handbook. The examples are complete, and the code is available for you to get started right away. Highly recommended.

Thomas D. Tessier, President,
t2design, Inc.

This handbook contains a lot of useful advice for any verification engineer wanting to create a class-based testbench, regardless of the framework/methodology used. I recommend Hardware Verification with SystemVerilog to anyone who wants a greater understanding of how best to use OOP with SystemVerilog.

Dr. David Long, Senior Consultant,
Doulos

This is a fantastic book that not only shows how to use SystemVerilog and Object-Oriented Programming for verification, but also provides practical examples that are open source!

Stephanie Waters, Field Applications Engineer,
Cadence Design Systems

I have been using SystemVerilog for two years in my research, and this is by far the best book I have found about how to achieve professional grade verification. I will apply these techniques on my future projects.

Dr. Oswaldo Cadenas, Lecturer, Electronic Engineering,
University of Reading, U.K.

Review:

Excellent to learn SystemVerilog with OOP concepts

There are other couple of SV verification books in the market which teaches more on systemverilog syntax but this is the right book which teaches you the OOP concepts and how they are applied in System Verilog.. I strongly recommend for all verification engineers who want to get max out of SV language. It has very good examples also.

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