HyperTransport System Architecture

Description

HyperTransport? (HT) technology promises to revolutionize connectivity for computers, servers, embedded systems, and networking and tele-communications equipment. It is a high-speed, low latency, point-to-point, packetized link that enables chips to transfer data at peak rates of up to 12.8 Gigabytes per second, far greater than existing bus technologies. Furthermore, HyperTransport improves reliability and reduces board design complexity. It is scalable and compatible with legacy PC buses, SNA, and PCI.



HyperTransport? System Architecture provides a comprehensive, technical guide to HyperTransport technology. It opens with an overview of HT systems, highlighting the technology's fundamental principles, basic architecture, and its many advantages. The book goes on to detail all facets of HyperTransport systems, including the protocol, I/O, routing, configuration, and more. It also features important performance considerations and addresses critical compatibility issues.



Essential topics covered include:



* Signal groups

* Packet protocol, covering control and data packets

* HT flow control, and how it differs from PCI flow control

* I/O ordering rules, including upstream, downstream, and host ordering requirements

* Interrupts, error detection, and error handling

* HT system management

* Routing packets, covering point-to-point topology and HT's fairness algorithm

* Device configuration

* The electrical environment, including power requirements and signaling characteristics

* HyperTransport bridges

* Double-hosted chains

* Anticipated networking extensions

* PCI, PCI-X, AGP, and X86 compatibility issues



A chapter is dedicated to transaction examples illustrating the practical application of HyperTransport technology.



Book Info:
Published in 2003
Author Jay Trodden
ISBN 0321168453  Size 6.65MB

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