Quintessential PIC Microcontroller

Description

contents
list of figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v?
list of tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . x?
list of programs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . xýv
part ?the fundamentals
1. digital representation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2. logic circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3. stored program processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
part ýý the software
4. the pýc16f84 microcontroller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
5. the ýnstruction set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105
6. subroutines and modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137
7. ýnterrupt handling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 171
8. assembly language .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 197
9. high-level language . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 231
part ýý?the outside world
10. the real world . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 253
11. one byte at a time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 271
v?contents
12. one bit at a time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 305
13. time is of the essence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 361
14. take the rough with the smooth . . . . . . . . . . . . . . . . . . . . . . . . . . . . 391
15. to have and to hold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 431
16. a case study . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 455
appendices
a. 14-bit core ýnstruction set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 475
b. special purpose register structure for the pýc16c74b . . . . . . . . . 477
c. c ýnstruction set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 479
d. acronyms and abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 481
ýndex . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 485
list of figures
1.1 the not operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
1.2 the and function. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
1.3 the inclusive-or operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
1.4 the xor operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
1.5 detecting sign overflow. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2.1 the 74ls00 quad 2-?p nand package. . . . . . . . . . . . . . . . . . . . . . . 18
2.2 output structures. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
2.3 open-collector buffers driving a party line. . . . . . . . . . . . . . . . . . . 20
2.4 sharing a bus. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
2.5 the 74ls138 and ?39 ms?natural decoders. . . . . . . . . . . . . . . . . 21
2.6 the 74ls688 octal equality detector. . . . . . . . . . . . . . . . . . . . . . . . . 23
2.7 addition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
2.8 ýmplementing a programmable adder/subtractor. . . . . . . . . . . . 25
2.9 the 74ls382 alu. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
2.10 a rom-implemented 1-bit adder. . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
2.11 the 2764 erasable prom. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
2.12 floating-gate mosfet link . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
2.13 the rs latch.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
2.14 using a rs latch to debounce a switch. . . . . . . . . . . . . . . . . . . . . . . 30
2.15 the d latch and flip flop. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
2.16 the 74ls74 dual d flip flop. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
2.17 the 74ls377 octal d flip flop array. . . . . . . . . . . . . . . . . . . . . . . . . . 33
2.18 the 74ls373 octal d latch array. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
2.19 an 8-bit alu-accumulator processor. . . . . . . . . . . . . . . . . . . . . . . . 35
2.20 the sýso shift register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
2.21 the t flip flop. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
2.22 a modulo-16 ripple counter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
2.23 generating timing waveforms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
2.24 the 6264 8196 ?8 ram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
3.1 an elementary von neumann computer. . . . . . . . . . . . . . . . . . . . . . 42
3.2 an elementary harvard architecture computer. . . . . . . . . . . . . . . 44
3.3 executing the 1st instruction whilst fetching down the 2nd. . . 45
3.4 parallel fetch and execute streams. . . . . . . . . . . . . . . . . . . . . . . . . . . 50
výý?list of figures
3.5 programmer’s model. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
3.6 the indirect mechanism. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
3.7 circular shifts. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
3.8 the process. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
3.9 visualization of the taskprocess. . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
3.10 division by repetitive subtracting. . . . . . . . . . . . . . . . . . . . . . . . . . . 68
3.11 double-precision shifting. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
3.12 a 7-bit pseudo-random number generator. . . . . . . . . . . . . . . . . . . 70
4.1 an example of a system based on a microcontroller. . . . . . . . . . 81
4.2 architecture of the pýc16f84 microcontroller . . . . . . . . . . . . . . . 85
4.3 showing how all of the pc are altered when writing to pcl. . . . 86
4.4 ýnternal clocksequencing waveforms. . . . . . . . . . . . . . . . . . . . . . . . 87
4.5 the pýc16f84 status register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
4.6 data store memory map. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
5.1 general 14-bit core status register. . . . . . . . . . . . . . . . . . . . . . . . . . . 109
5.2 the indirect mechanism. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
5.3 the ith section of the compare-update sequence. . . . . . . . . . . . . 112
5.4 generating a 13-bit program-store address. . . . . . . . . . . . . . . . . . . 114
6.1 modular hardware implementing a pc. . . . . . . . . . . . . . . . . . . . . . . 138
6.2 subroutine calling. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140
6.3 using the hardware stackhold return addresses. . . . . . . . . . . . . 141
6.4 nested subroutines. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142
6.5 system view of k ?100ms delay subroutine. . . . . . . . . . . . . . . . . 145
6.6 the 7-segment display. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 148
6.7 system diagram for the byte multiplication subroutine. . . . . . . 150
6.8 the stackframe. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 154
6.9 finding the square root of an integer. . . . . . . . . . . . . . . . . . . . . . . . 162
7.1 detecting and measuring an external event. . . . . . . . . . . . . . . . . . 172
7.2 responding to an interrupt request.. . . . . . . . . . . . . . . . . . . . . . . . . 175
7.3 the flag:maskpair. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 176
7.4 the pýc 16f84’s interrupt logic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 178
7.5 oven safety hardware. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 188
7.6 echo sounding hardware. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 195
8.1 conversion from assembly-level source to machine code. . . . . 198
8.2 absolute assembly-level code translation. . . . . . . . . . . . . . . . . . . . 202
8.3 relocatable assembly-level code translation. . . . . . . . . . . . . . . . . . 211
8.4 linking three source files. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 213
8.5 code building and testing tools. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 219
8.6 mplab window. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 221
8.7 mplab screen shot. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 222
list of figures ýx
9.1 conversion from high-level source code to machine code. . . . . 233
9.2 onion skin view of the steps leading to executable code. . . . . . 234
9.3 simulating our example program in mplab. . . . . . . . . . . . . . . . . . 242
9.4 the active-low die patterns. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 250
10.1 pinout for a variety of pýc family members. . . . . . . . . . . . . . . . . . 254
10.2 typical supply current versus clocking frequency. . . . . . . . . . . . 256
10.3 equivalent output circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 257
10.4 typical oscillator configurations.. . . . . . . . . . . . . . . . . . . . . . . . . . . . 258
10.5 configuration word for the pýc16f83/4. . . . . . . . . . . . . . . . . . . . . . 261
10.6 manually resetting the pýc. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 263
10.7 the sequence of events leading to startup on power-up. . . . . . 264
10.8 brown-out reset. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 267
10.9 an alternative brown-out circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 269
11.1 the mid-range pýc 16cxx series parallel portsa and b. . . . . . . 272
11.2 a simplified typical ?o port line. . . . . . . . . . . . . . . . . . . . . . . . . . . . 273
11.3 reading and writing to a port bit set to input or output. . . . . . 275
11.4 sinking and sourcing current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 276
11.5 porta ?o pin driver structure. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 278
11.6 ýnterfacing switches to a port line. . . . . . . . . . . . . . . . . . . . . . . . . . . 280
11.7 port b’s weakpull-up option. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 280
11.8 ýnterfacing to a keypad. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 281
11.9 the port b change feature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 285
11.10 a multi-zone intruder alarm. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 287
11.11 source current against voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 290
11.12 the stepper motor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 294
11.13 using port expansion to drive three 7-segment displays. . . . . . 298
11.14 scanning a 3-digit 7-segment array. . . . . . . . . . . . . . . . . . . . . . . . . . 299
11.15 low-level output voltage against sinkcurrent. . . . . . . . . . . . . . . . 304
12.1 the smart card. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 305
12.2 se-ri-@l interface to a 3-digit 7-segment display. . . . . . . . . . . . . . . . 307
12.3 logic functional diagram of the 74hct595 octal shift register. 309
12.4 serially interfacing to a dac0800 digital to analog converter. 310
12.5 serially interfacing to the multi-zone intruder alarm. . . . . . . . . 311
12.6 the max549a sp?dual 8-bit dac. . . . . . . . . . . . . . . . . . . . . . . . . . . 314
12.7 sp?waveforms for the max549a. . . . . . . . . . . . . . . . . . . . . . . . . . . . 316
12.8 multiple max549as on the one sp?circuit. . . . . . . . . . . . . . . . . . . 316
12.9 the basic se-ri-@l synchronous port. . . . . . . . . . . . . . . . . . . . . . . . . . . 317
12.10 the ssp control and status registers. . . . . . . . . . . . . . . . . . . . . . 318
12.11 ssp sp?mode master waveforms. . . . . . . . . . . . . . . . . . . . . . . . . . . . 321
12.12 a multidrop sp?communications network. . . . . . . . . . . . . . . . . . . 322
12.13 data transfer on the ?c bus. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 325
12.14 sharing the scl and sda bus lines. . . . . . . . . . . . . . . . . . . . . . . . . . . 326
x list of figures
12.15 a ?c packet transmission. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 327
12.16 the maxým max518 ?c dual digital to analog converter. . . . . 328
12.17 minimum timing relationships for the fast ?c mode. . . . . . . . . 329
12.18 transmitting the string "pýc" in the asynchronous mode . . . . . 336
12.19 the pýc usart configured for asynchronous communication. 342
12.20 some signalling configurations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 347
12.21 communicating with a pc via an rs-232 link. . . . . . . . . . . . . . . . . 349
12.22 the 24xxx series of ?c se-ri-@l eeproms. . . . . . . . . . . . . . . . . . . . . 352
12.23 eeprom read and write waveforms. . . . . . . . . . . . . . . . . . . . . . . . . 355
12.24 ýnterfacing the ds1820 1-wire digital thermometer. . . . . . . . . . 356
12.25 a lcd display. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 360
13.1 the integral pýc watchdog timer. . . . . . . . . . . . . . . . . . . . . . . . . . . . 362
13.2 the option register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 363
13.3 simplified equivalent circuit for timer 0. . . . . . . . . . . . . . . . . . . . . 365
13.4 counting cans of beans on a conveyer belt. . . . . . . . . . . . . . . . . . . 366
13.5 functional equivalent circuit for timer 1 . . . . . . . . . . . . . . . . . . . . 372
13.6 the ccp1 module set to compare mode. . . . . . . . . . . . . . . . . . . . . 375
13.7 capturing the time of an event. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 377
13.8 a simplified equivalent circuit for timer 2. . . . . . . . . . . . . . . . . . . 379
13.9 pulse width modulation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 380
13.10 timer 2 and the pwm ccp mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 381
13.11 an event manifesting itself as a pulse duration. . . . . . . . . . . . . . 387
14.1 analog world ?digital processing. . . . . . . . . . . . . . . . . . . . . . . . . . . 391
14.2 the quantizing process. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 393
14.3 the analog–digital process. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 396
14.4 ýllustrating aliasing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 397
14.5 ýnitializing the 8-4-2-1 capacitor network. . . . . . . . . . . . . . . . . . . . 398
14.6 simplified view of the a/d converter. . . . . . . . . . . . . . . . . . . . . . . . 400
14.7 the successive approximation process. . . . . . . . . . . . . . . . . . . . . . 402
14.8 the 8-bit 8-channel analog to digital conversion module. . . . . 404
14.9 configuring the analog inputs for porta and port e. . . . . . . . . . . 405
14.10 ýnterrupt control for the adc module. . . . . . . . . . . . . . . . . . . . . . . 408
14.11 r-2r digital-to-analog conversion. . . . . . . . . . . . . . . . . . . . . . . . . . . . 416
14.12 the maxim max506 quad 8-bit d/a converter. . . . . . . . . . . . . . . 418
14.13 generating a continuous sawtooth using a max506 dac. . . . . 419
14.14 buffered data acquisition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 420
14.15 a level-shifting resistor network. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 423
14.16 ecg detection strategy. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 426
14.17 a controllable external voltage circuit. . . . . . . . . . . . . . . . . . . . . . . 429
14.18 pinning for the pýc16c71. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 429
15.1 the pýc16f8x data eeprom module. . . . . . . . . . . . . . . . . . . . . . . . . 433
15.2 the pýc16f8x eecon1 register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 434
list of figures x?
15.3 the first 32 bytes of eeprom.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 438
15.4 the pýc16f87x flash and data eeprom storage system. . . . . . . 440
15.5 the pýc16f87x eeprom control register 1. . . . . . . . . . . . . . . . . . . 441
15.6 view of the flash program module. . . . . . . . . . . . . . . . . . . . . . . . . . . 445
15.7 configuration word for the pýc16f87x devices. . . . . . . . . . . . . . . 445
15.8 watchdog timer period versus temperature. . . . . . . . . . . . . . . . . . 448
16.1 the annunciator hardware. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 456
16.2 the modular software structure. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 458
16.3 the main process. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 468
16.4 programming the pýc from mplab.. . . . . . . . . . . . . . . . . . . . . . . . . . 472
16.5 the microchip pýcstart plus programmer. . . . . . . . . . . . . . . . . . 473

list of tables
1.1 7-bit ascýý characters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.2 some common bit groupings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.3 different ways of representing the quantities decimal 0?0. . 7
3.1 our basýc computer’s instruction set. . . . . . . . . . . . . . . . . . . . . . . 53
5.1 move instructions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
5.2 arithmetic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117
5.3 logic instructions.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121
5.4 program counter instructions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127
6.1 subroutine and interrupt handling instructions. . . . . . . . . . . . . . 139
6.2 the 7-segment lookup table showing byte[n] being extracted. 149
8.1 the listing file root.lst. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 206
8.2 the absolute 8-bit ýntel format object-code file root.hex. . . . 206
8.3 the error file . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 207
8.4 part of microchip’s file p16f84.inc. . . . . . . . . . . . . . . . . . . . . . . . . 209
8.5 the pic16f84.lkr linker command file. . . . . . . . . . . . . . . . . . . . . 212
8.6 the output linker map file rms.asm. . . . . . . . . . . . . . . . . . . . . . . . . 218
8.7 the resulting absolute object file rms.hex. . . . . . . . . . . . . . . . . . . 219
9.1 resulting assembly-level ccs compiler output after linking. . . 240
10.1 pýc16f83/4 special-purpose register file reset summary. . . . . 263
10.2 power-up reset and sleep timeouts. . . . . . . . . . . . . . . . . . . . . . . . . 265
10.3 reset conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 266
11.1 summary of mid-range pýc parallel ?o provision. . . . . . . . . . . . 272
11.2 energization pattern for the eight field directions. . . . . . . . . . . . 294
12.1 the ssp mode bits. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 319
14.1 quantization parameters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 394
14.2 adc clocking frequency versus device crystal frequency. . . . . 401
14.3 configuring the adc port pins in the pýc16c73/74 devices. . . 405

list of programs
3.1 clearing a blockof files the linear way. . . . . . . . . . . . . . . . . . . . . . . 56
3.2 clearing a blockof files using a repeating loop. . . . . . . . . . . . . . . 57
3.3 simple single-precision addition of two byte variables. . . . . . . . 64
3.4 a more accurate single-precision addition. . . . . . . . . . . . . . . . . . . 64
3.5 the double-precision add program. . . . . . . . . . . . . . . . . . . . . . . . . . 66
3.6 dividing by ten. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
3.7 multiplying by nine. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
3.8 a 7-bit pseudo-random number generator. . . . . . . . . . . . . . . . . . . 71
4.1 ýncrementing a packed bcd byte. . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
4.2 adding two packed bcd numbers. . . . . . . . . . . . . . . . . . . . . . . . . . . 103
5.1 finding the maximum temperature the linear way. . . . . . . . . . . . 111
5.2 finding the maximum temperature using a loop structure. . . . 113
5.3 division by repetitive subtraction. . . . . . . . . . . . . . . . . . . . . . . . . . . 118
5.4 shifting to find the highest set bit. . . . . . . . . . . . . . . . . . . . . . . . . . . 124
5.5 triple-precision shifting to find the number of set bits. . . . . . . 125
5.6 multiplying by three. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126
5.7 double-precision decrement. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128
5.8 bi-quinary error detection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130
5.9 binary to 2-digit bcd conversion. . . . . . . . . . . . . . . . . . . . . . . . . . . . 131
5.10 average daily temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132
5.11 multiplication by ten. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133
6.1 a 100ms delay subroutine. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 144
6.2 a k ?100ms delay subroutine. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 146
6.3 an alternative k ?100ms delay subroutine. . . . . . . . . . . . . . . . . 147
6.4 the software 7-segment decoder. . . . . . . . . . . . . . . . . . . . . . . . . . . . 149
6.5 the byte multiplication subroutine. . . . . . . . . . . . . . . . . . . . . . . . . . 152
6.6 ýmplementing a byte multiply using a stackmodel. . . . . . . . . . . 157
6.7 dividing by three . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 158
6.8 coding a 208 µs delay. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 159
6.9 a 1-second delay program. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160
6.10 binary to 3-digit bcd conversion. . . . . . . . . . . . . . . . . . . . . . . . . . . . 161
6.11 coding the square root subroutine. . . . . . . . . . . . . . . . . . . . . . . . . . 163
6.12 using a software stackto pass parameters. . . . . . . . . . . . . . . . . . . 166
6.13 the software 7-segment decoder revisited. . . . . . . . . . . . . . . . . . . 166
xv?list of programs
7.1 background program for the pea canning packer. . . . . . . . . . . . . 181
7.2 event counting foreground software. . . . . . . . . . . . . . . . . . . . . . . . . 183
7.3 oven safety.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 187
7.4 saving and restoring the context for the pýc16c74 processor. 191
7.5 coding the real-time clockýsr. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 193
7.6 ýncrementing a packed-bcd byte with maximum value of 99.. 194
8.1 absolute assembly-level code for our square-root module. . . . 200
8.2 the main relocatable source file main.asm. . . . . . . . . . . . . . . . . . . 214
8.3 the relocatable source file sqr.asm. . . . . . . . . . . . . . . . . . . . . . . . . 215
8.4 the relocatable source file root2.asm. . . . . . . . . . . . . . . . . . . . . . . 216
9.1 a simple function coded in c.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 236
9.2 coding the square root function. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 245
9.3 linearizing a k-type thermocouple. . . . . . . . . . . . . . . . . . . . . . . . . . 246
9.4 generating the root-mean square value of two variables. . . . . . 247
11.1 scanning the keypad. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 283
11.2 noise filtered keypad scanning. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 284
11.3 ýnteracting with the intruder hardware. . . . . . . . . . . . . . . . . . . . . . 288
11.4 a digital comparator with hysteresis. . . . . . . . . . . . . . . . . . . . . . . . 292
11.5 driving a stepper motor.. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 293
11.6 coding the keypad device driver in c. . . . . . . . . . . . . . . . . . . . . . . . 297
11.7 displaying the decimal equivalent of a binary byte. . . . . . . . . . . 301
11.8 displaying a 3-digit decimal number on a scanning readout. . 302
12.1 displaying the decimal equivalent of a binary byte. . . . . . . . . . . 308
12.2 ýnput se-ri-@l byte subroutine. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 312
12.3 ýnteracting with the max549a dual-channel sp?dac. . . . . . . . . 315
12.4 using the ssp for sp?data input and output. . . . . . . . . . . . . . . . . . 320
12.5 ýnterfacing to the max549a in c. . . . . . . . . . . . . . . . . . . . . . . . . . . . 323
12.6 a crystal frequency-independent short delay macro. . . . . . . . . . 331
12.7 low-level ?c subroutines. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 332
12.8 ýnteracting with the max518 dual-channel ?c dac. . . . . . . . . . 334
12.9 ýnterfacing to the max518 in c. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 335
12.10 a baud-rate delay macro. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 338
12.11 asynchronous formatted input and output subroutines. . . . . . 340
12.12 the usart-based ?o subroutines. . . . . . . . . . . . . . . . . . . . . . . . . . . 345
12.13 updating program 11.4’s trip value. . . . . . . . . . . . . . . . . . . . . . . . . . 350
12.14 reading in a byte using the ?c protocol. . . . . . . . . . . . . . . . . . . . . 351
12.15 ýncrementing the non-volatile odometer count. . . . . . . . . . . . . . . 354
12.16 reading and writing on a 1-wire system. . . . . . . . . . . . . . . . . . . . . 358
13.1 the bean counter ýnterrupt service routine. . . . . . . . . . . . . . . . . . 368
13.2 measuring the ecg waveform period to a resolution of 1ms. . 370
13.3 generating a 15 minute data logger timebase. . . . . . . . . . . . . . . . 374
13.4 capturing the instant of time an ecg r-point occurs. . . . . . . . . 378
13.5 pulse-width modulation using timer 0. . . . . . . . . . . . . . . . . . . . . . . 384
13.6 tachometer software. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 386
list of programs xvýý
13.7 measuring the duration of a pulse. . . . . . . . . . . . . . . . . . . . . . . . . . . 388
14.1 taking a reading from channeln. . . . . . . . . . . . . . . . . . . . . . . . . . . . 407
14.2 ýnterrupt-driven subroutine to read channel n. . . . . . . . . . . . . . . 410
14.3 the ýsr for our interrupt-driven adc software. . . . . . . . . . . . . . . 411
14.4 digitizing channel 1 of a pýc16c71 device. . . . . . . . . . . . . . . . . . . 412
14.5 a digital/analog comparator with hysteresis. . . . . . . . . . . . . . . . . 414
14.6 buffered interrupt-driven data acquisition. . . . . . . . . . . . . . . . . . . 421
14.7 sleep conversion in c. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 422
14.8 ecg peakpick ing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 425
14.9 an implementation of the ecg peakpick er in c. . . . . . . . . . . . . . 427
15.1 retrieving a byte from the eeprom data module. . . . . . . . . . . . . 434
15.2 putting a byte into the eeprom data module.. . . . . . . . . . . . . . . . 436
15.3 ýncrementing the non-volatile odometer count in data eeprom. 437
15.4 reading a word from the flash program store. . . . . . . . . . . . . . . . 442
15.5 writing to flash program memory. . . . . . . . . . . . . . . . . . . . . . . . . . . 443
15.6 squaring an integer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 444
15.7 c-based coding for the odometer. . . . . . . . . . . . . . . . . . . . . . . . . . . . 446
15.8 the sauna power-up reset sequence and ýsr. . . . . . . . . . . . . . . . . 450
15.9 reading a new period count. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 451
15.10 updating the sauna eeprom. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 452
16.1 the timebase software. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 461
16.2 the data display function. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 463
16.3 the initialization code. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 465
16.4 the diagnostic process. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 466
16.5 the set-time process. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 467
16.6 the main process. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47


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