Reconfigurable System Design and Verification

Description

Product Description:

Focusing on system-level design and verification techniques, this text allows readers to immediately grasp concepts and put them into practice. It starts with an overview of reconfigurable computing architectures and platforms and demonstrates how to develop reconfigurable systems. This sets up the discussion of the hardware, software, and system techniques that form the core of the text. The authors classify design and verification techniques into primary and secondary categories, allowing the appropriate ones to be easily located and compared. The techniques discussed range from system modeling and system-level design to co-simulation and formal verification. Case studies illustrate real-world applications.

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Summary: Design for partial reconfiguration
Rating: 4

Despite its broad title, this deals almost exclusively with partial reconfiguraton (PR) of FPGA-based systems, and run-time PR at that. This limits the scope of discussion rather severely. Although static PR can be applied to any FPGA, run-time PR, especially the kind that leaves other parts of the FPGA running, currently works in only one vendor's product line. (In the interest of full disclosure, you should know that I currently work for a different vendor.) The other major fact about PR is that, to date, few if any commercial applications use it. I've seen PR deployed just once - although conceptually interesting, it has yet to have any real impact on the marketplace.

But, if PR is ever going to have impact, it will be because research like this has already blazed the trail. The authors start with a basic introduction to PR and the kinds of systems in which it has potential value. Next they describe the chips and data formats that support PR, to establish the basic capabilities and constraints of the hardware. After that, the book gets down to the real meat of the subject. The authors first address system decomposition, both spatial and temporal, to establish the reconfiguration domains of the application. Next, they describe a software executive system for managing PR and sharing on-chip resources between contending applications. The remainder of the book deals with the tools that implement PR and with verification - making sure that the system does what it was designed to do. In part, PR has had limited acceptance because of difficult tool flows, so design tools offer many opportunities for creative toolsmiths. Verification offers challenges too. Verifying fixed configurations is hard enough; dynamically changing configurations add a whole new dimension of complexity. I saw only one significant gap in this discussion: application security. Electrical rule checks on configuration files can block potentially destructive malware. Other issues exist when applications have access to the hardware fabric, however, and the authors seem not to address techniques for detecting or blocking bad behavior of a PR domain.

Researchers in PR should read this book. Although a real survey of the field has yet to be written, this presents a worthwhile snapshot and a detailed discussion on one approach to PR. Maybe PR isn't ready for widespread deployment yet. Forces within the FPGA industry seem to be making the need for PR applications inevitable, though, and studies like this lay the foundation for those future applications, tools, and support systems.

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