System-on-a-Chip Verification - Methodology and Techniques
Category: Technical
Tag: Science/Engineering
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Description
Prakash Rashinkar, Peter Paterson, Leena Singh"System-on-a-Chip Verification - Methodology and Techniques"
Kluwer Academic Publishers | ISBN: 0792372794 | 2000 | 392 pages | PDF | 6.6 MB
Contents
CHAPTER 1 Introduction .
CHAPTER 2 System-Level Verification
CHAPTER 3 Block-Level Verification
CHAPTER 4 Analog/Mixed Signal Simulation
CHAPTER 5 Simulation
CHAPTER 6 Hardware/Software Co-verification
CHAPTER 7 Static Netlist Verification
CHAPTER 8 Physical Verification and Design Sign-off
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